A 0.69-Noise-Efficiency-Factor 55× -Preamp-Gain Dynamic Comparator With a Stacking FIA
This article presents a fully dynamic, low-noise, low-power comparator. Its key highlight is the four-times current-reuse factor, which improves the pre-amplifier gain by at least two times without increasing the power consumption. This causes the proposed design to have a two-times smaller input-referred noise and a two-times better noise-efficiency factor (energy <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> noise power). In prior comparators, the maximum current-reuse factor of the pre-amplifier was only two times. This small current-reuse factor limits the pre-amplifier gain to 30 times, which restricts the further improvement in the noise-efficiency factor. By contrast, this work stacks two floating inverter amplifiers (FIAs) in order to greatly increase the current-reuse factor to as large as four times. As a result, the pre-amplifier gain is increased by 55 times, which is helpful for improving the noise-efficiency factor. Implemented in a 28 nm CMOS process, the prototype comparator achieves a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$38~{\mu }$ </tex-math></inline-formula>V input-referred noise and a 0.48 pJ energy consumption per comparison under a 0.9 V supply. The noise-efficiency factor is as good as 0.69 nJ<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\cdot \mu $ </tex-math></inline-formula>V2, which is three times better than the prior FIA-based comparator and 23 times better than the classic StrongArm latch (SA latch). This noise-efficiency factor is the best among all reported works so far.
Authors
- Haoyu Zhuang (ORCID: https://orcid.org/0000-0002-5019-3563)
- Linzhi Tao (ORCID: https://orcid.org/0000-0002-4246-7077)
- Qiang Li (ORCID: https://orcid.org/0000-0001-9503-995X)
- Yirui Cao (ORCID: https://orcid.org/0009-0007-3587-1761)
Institutions
- University of Electronic Science and Technology of China (CN)
Publication Details
- Journal
- IEEE Journal of Solid-State Circuits
- Published
- 2024-08-29
- DOI
- https://doi.org/10.1109/jssc.2024.3446175
- Citations
- 4
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.74
Funders
- National Natural Science Foundation of China
- China Postdoctoral Science Foundation
- Natural Science Foundation of Sichuan Province