Investigation of the Trapping and Detrapping Behavior by the On-State Resistance at Low Off-State Drain Bias in Schottky p-GaN Gate HEMTs

GaN power HEMTs enable the design of power electronic systems with highest efficiencies and reduced size. Despite strong advancements in device reliability, charge carrier trapping is still an important challenge. The applied methodology allows to characterize defects that cause the dynamic R DS,on in GaN power devices at product level with flexibility in duty cycle, number of pulses and mission profile. A pronounced trapping is observed for lateral GaN-on-Si HEMTs with Schottky p-GaN gate structure at low drain bias and long off-state pulses (> 100 ms). The effect is investigated by fast determination of the on-state resistance R DS,on under different trap capturing conditions: a) different drain bias b) off-state time and number of cycles c) variation of temperature. The trapping and detrapping effects are characterized and the activation energy is extracted from time constants. An elevated on-state resistance was present for up to 3 hours. The threshold voltage modification due to high drain bias does explain the significant R DS,on increase.