On the consistency of circuit lower bounds for non-deterministic time

We prove the first unconditional consistency result for superpolynomial circuit lower bounds with a relatively strong theory of bounded arithmetic. Namely, we show that the theory [Formula: see text] is consistent with the conjecture that [Formula: see text], i.e. some problem that is solvable in non-deterministic exponential time does not have polynomial size circuits. We suggest this is the best currently available evidence for the truth of the conjecture. The same techniques establish the same results with [Formula: see text] replaced by the class of problems decidable in non-deterministic barely superpolynomial time such as [Formula: see text]. Additionally, we establish a magnification result on the hardness of proving circuit lower bounds.

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Publication Details

Journal
Journal of Mathematical Logic
Published
2024-08-23
DOI
https://doi.org/10.1142/s0219061324500235
Primary Topic
Low-power high-performance VLSI design
Type
article
Field-Weighted Citation Impact
0.00

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article

On the consistency of circuit lower bounds for non-deterministic time

Albert Atserias, Sam Buss, Moritz Müller
Journal of Mathematical Logic
Low-power high-performance VLSI design
article

On the consistency of circuit lower bounds for non-deterministic time

Albert Atserias, Sam Buss, Moritz Müller
article en

Abstract

We prove the first unconditional consistency result for superpolynomial circuit lower bounds with a relatively strong theory of bounded arithmetic. Namely, we show that the theory [Formula: see text] is consistent with the conjecture that [Formula: see text], i.e. some problem that is solvable in non-deterministic exponential time does not have polynomial size circuits. We suggest this is the best currently available evidence for the truth of the conjecture. The same techniques establish the same results with [Formula: see text] replaced by the class of problems decidable in non-deterministic barely superpolynomial time such as [Formula: see text]. Additionally, we establish a magnification result on the hardness of proving circuit lower bounds.

Journal of Mathematical LogicVol. 25(03)
University of Passau (DE), University of California San Diego (US), Centre de Recerca Matemàtica (ES), Universitat Politècnica de Catalunya (ES)
Simons Foundation, University of California, San Diego, Agencia Estatal de Investigación
Reduced inequalities
Openalex Percentile: Top 89%
Low-power high-performance VLSI design
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