Synthesis and Comparison of a Family of Three-Winding Coupled Inductor High Step-Up DC–DC Converters Using Stacked, Parallel, and Cascade Association Techniques

Three-winding coupled inductor structures have gained popularity in high-voltage-gain dc–dc converters. This cell allows generating an infinity of topologies. However, there are no well-established methods for synthesizing these types of converters. In this sense, in order to contribute and create a simple synthesis and generation of high-voltage-gain converters, this article presents a family of high step-up dc–dc converters based on boost converter and three-winding coupled inductor cell with different connection configurations, named: stacked, parallel, and cascade. These connections are discussed throughout this article. Furthermore, combinations of two or more connections are presented and their generated topologies as well. In addition, comparative evaluations are presented, such as high-voltage-gain converters: principle of operation; static gain; voltage stress; current stress. Since each converter has its own characteristics and the main factors that impact this are the duty cyclic (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$D$</tex-math></inline-formula>), turns ratio (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$N$</tex-math></inline-formula>) of the coupled inductor, both theoretical and experimental evaluations are made considering different values of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$D$</tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$N$</tex-math></inline-formula>. To validate the theoretical analyzes, a set of prototypes was built in the laboratory. Among these evaluated topologies, the one with the high efficiency performance achieved is 97%, which is the combination of stacked configuration with voltage multiplier cell.