A 10-bit Source-Driver IC With Charge-Modulation DAC for Enhanced Frame-Rate Mobile OLED Displays

This article presents a 10-bit source-driver IC (SD-IC) developed for mobile displays. Conventional area-efficient designs tend to compromise digital-to-analog conversion (DAC) speed, increasing the 1-horizontal (1-H) time. To overcome the tradeoff between area efficiency and speed, this work proposes the parallel injection of a voltage-interpolative charge during the main output drive. The charge-modulation (QM) DAC, central to this mechanism, offers competitive area efficiency and true-dc voltage interpolation, ensuring linearity. In addition, we introduce the correlated double integrating (CDI) technique that effectively cancels errors arising during voltage-to-charge conversion (VQC). Moreover, this work also presents a low-overhead approach to enhancing the slew rate in buffer amplifier design. The prototype 600-channel SD-IC was fabricated in a 180-nm CMOS process. The maximum differential nonlinearity (DNL) and integral nonlinearity (INL) were measured to be 0.21 and 1.21 LSB, respectively, with a 1-LSB voltage of 4.5 mV. The maximum deviation of voltage outputs (DVOs) was 11.5 mV. The proposed 10-bit SD-IC features a die area of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3315~\mu $ </tex-math></inline-formula>m2 per channel and a 1-H time of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.5~\mu $ </tex-math></inline-formula>s. A slew rate of 22 V/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu $ </tex-math></inline-formula>s was achieved with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$C_{\textrm {LOAD}} =100$ </tex-math></inline-formula> pF.