Conductive Bridging Random Access Memory-Based Switch Matrix for Reconfigurable Interconnection of Chiplet Integration

A reconfigurable interconnection technology is proposed in this letter for chiplet integrated systems, with conductive bridging random access memory (CBRAM) based switch matrix. The switch matrix with a crossbar structure is implemented easily by spin-coating process, compatible with the packaging technology of high-resistivity silicon interposer. The equivalent circuit model is established. A <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${2}\times {2}$ </tex-math></inline-formula> switch matrix prototype is developed with the insertion loss below 3.8 dB for arbitrary transmission path from DC to 67 GHz. The fabricated <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${4}\times {4}$ </tex-math></inline-formula> switch matrix prototype achieves the 3-dB bandwidth over DC to 30 GHz. Under the data rate of 30 Gbps and the rise time of 15 ps, the near- and far-end crosstalks are all below 3% of the input signal swing, the eye height is 71%, and the root-mean-square jitter is only 1.26 ps. Noting that the CBRAM-based switch matrix consumes no static power, the proposed reconfigurable passive silicon interposer is a promising technology for flexible chiplet integration.