A 65 nm CMOS Analog Programmable Standard Cell Library for Mixed-Signal Computing
Integrated circuit (IC) design for analog computing requires similar toolflows and synthesis as large-scale digital systems, in-turn necessitating a library of general-purpose analog cells. To this end, we present a programmable, floating-gate (FG)-based analog standard cell library in a commercially available 65 nm process that allows analog IC designers to use synthesis tools with an abstracted design mindset similar to large-scale digital design. We fabricate the test cells, which include filters with programmable corners, an analog classifier, and an arbitrary waveform generator (AWG); experimentally characterize FG programming; and experimentally demonstrate the performance of the standard cells. Overall, the standard cells achieve a similar or smaller footprint than previous approaches while leveraging the benefits of FG programming at smaller technology nodes.
Authors
- Pranav O. Mathews (ORCID: https://orcid.org/0000-0002-2818-9410)
- Jennifer Hasler (ORCID: https://orcid.org/0000-0002-6866-3156)
- Swagat Bhattacharyya (ORCID: https://orcid.org/0000-0001-9128-953X)
- Afolabi Ige
- Praveen Raj Ayyappan (ORCID: https://orcid.org/0009-0003-9652-430X)
- Linhao Yang
Institutions
- Georgia Institute of Technology (US)
Publication Details
- Journal
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Published
- 2024-08-19
- DOI
- https://doi.org/10.1109/tvlsi.2024.3432916
- Citations
- 5
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.92