Temperature Evaluation and Failure Analysis of Wire-Bonded FRD Chips in Surge Conditions

The failure of power diode chips with bonding wires under surge conditions is closely associated with the temperature rise caused by self-heating. However, existing temperature evaluation methods cannot accurately evaluate the temperature distribution of chips under surge conditions. This article proposes an experimental-simulation iterative modeling method, which is based on the electro-thermal coupling finite element model to simulate and calculate the temperature distribution of diode chips under surge conditions. The simulated I-V trajectory and temperature distribution are in good agreement with the experimental results. In addition, by monitoring the degradation of electrical characteristic parameters of diode chips under surge conditions and analyzing the scanning electron microscope results of failed chips, it was concluded that the single surge limit of the chip can be determined by the occurrence of aluminum electromigration phenomenon, and the critical conditions for the chip to reach the surge limit were quantitatively determined with the assistance of simulation results. Finally, based on the proposed temperature evaluation method, the relationship between the number of chip bonding wires and the surge limit was obtained.