An Energy Efficient Residual Spiking Neural Network Accelerator With Ternary Spikes

Spiking neural networks (SNNs) use discrete binary spikes to transfer information between neurons, which is different from artificial neural networks (ANNs). Although event-based characteristics bring potential computation power and efficiency to SNNs, the long processing time window of discrete spikes leads to high latency. In this brief, a spike version of the residual network using ternary spikes is proposed. A shorter time window is required to achieve competitive performance because the ability to transfer information of the ternary spikes is strengthened. An SNN accelerator based on the proposed residual network with ternary spikes is designed and implemented with 28 nm CMOS technology, and the core area is 0.63 mm2. The proposed SNN accelerator achieves the classification accuracy of 92.07% on CIFAR-10 dataset with SResNet20 and only 6 time steps. The accelerator achieves 0.39 mJ energy consumption per frame with a throughput of 165.7 FPS when running at 500 MHz.

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Publication Details

Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Published
2024-08-13
DOI
https://doi.org/10.1109/tcad.2024.3443003
Citations
5
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
1.04

Funders

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article

An Energy Efficient Residual Spiking Neural Network Accelerator With Ternary Spikes

Yuxiang Fu, Wenqing Song, Qinyu Chen, Congyi Sun et al.
5 citations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Advanced Memory and Neural Computing
1.04
article

An Energy Efficient Residual Spiking Neural Network Accelerator With Ternary Spikes

Yuxiang Fu, Wenqing Song, Qinyu Chen, Congyi Sun, Li Li, Chenyang Dai
article en
5 citations

Abstract

Spiking neural networks (SNNs) use discrete binary spikes to transfer information between neurons, which is different from artificial neural networks (ANNs). Although event-based characteristics bring potential computation power and efficiency to SNNs, the long processing time window of discrete spikes leads to high latency. In this brief, a spike version of the residual network using ternary spikes is proposed. A shorter time window is required to achieve competitive performance because the ability to transfer information of the ternary spikes is strengthened. An SNN accelerator based on the proposed residual network with ternary spikes is designed and implemented with 28 nm CMOS technology, and the core area is 0.63 mm2. The proposed SNN accelerator achieves the classification accuracy of 92.07% on CIFAR-10 dataset with SResNet20 and only 6 time steps. The accelerator achieves 0.39 mJ energy consumption per frame with a throughput of 165.7 FPS when running at 500 MHz.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsVol. 44(1)
Leiden University (NL), Nanjing University (CN)
National Natural Science Foundation of China
Affordable and clean energy
Openalex Percentile: Top 23%
Advanced Memory and Neural Computing
1.04
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An Energy Efficient Residual Spiking Neural Network Accelerator With Ternary Spikes — Yuxiang Fu, Wenqing Song, et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2024) | TGRS Research Map | TGRS