Excellent Endurance (> 10<sup>13</sup>) of Charge Trap Memory Based on H<sub>x</sub>WO<sub>3</sub> Charge Trap Layer With Shallow Trap Level Using Hydrogen Spillover
In this study, we present an IGZO-based volatile charge trap memory, employing a hydrogenated WO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub>(H<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub>WO<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{{3}}\text {)}$ </tex-math></inline-formula> charge trap layer (CTL) with shallow traps. To overcome the interfacial issues in conventional Si-based transistors, we utilized the IGZO transistor to facilitate fast charge trapping / de-trapping within the CTL without barrier. Furthermore, through the hydrogen spillover with chemical reaction, we engineered the trap level and density in WO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> based CTL to achieve the shallow trap levels. Consequently, for the shallow trap level, high hydrogen concentration (>10%) was realized in the CTL owing to low activation energy with hydrogen spillover. In addition, both experimental results and Density Functional Theory simulations confirmed that hydrogen interstitial defects (H<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {i}}\text {)}$ </tex-math></inline-formula> could serve as shallow traps (<0.1 eV) in the H<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub>WO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> CTL when the hydrogen concentration exceeded 10% in the WO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> bulk. Finally, the synergy effect between the IGZO transistor and H<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{{0}.{18}}$ </tex-math></inline-formula> WO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> CTL enabled low voltage operation (<2 V), fast switching speed (<10 ns), highly stable endurance (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\gt 10^{{13}}$ </tex-math></inline-formula> cycles), large sensing margin (>3 V), multi-bit operation (3 bit), and excellent retention (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim ~20$ </tex-math></inline-formula> s).
Authors
- Young‐Dong Kim (ORCID: https://orcid.org/0000-0001-5904-4727)
- Geonhui Han (ORCID: https://orcid.org/0009-0002-0699-9241)
- Jongseon Seo (ORCID: https://orcid.org/0000-0002-5135-9350)
- Jaeseon Kim
- Hyunsang Hwang (ORCID: https://orcid.org/0000-0003-1930-1914)
- Donghwa Lee (ORCID: https://orcid.org/0000-0002-8956-3648)
Institutions
- Pohang University of Science and Technology (KR)
Publication Details
- Journal
- IEEE Electron Device Letters
- Published
- 2024-08-13
- DOI
- https://doi.org/10.1109/led.2024.3443087
- Citations
- 1
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.21
Funders
- National Research Foundation of Korea