The potential of LLMs in hardware design

The unprecedented success of Large Language Models (LLMs) like ChatGPT across diverse domains such as natural language understanding and coding has paved the way for their use in designing hardware to enhance productivity and reduce cost. Despite LLMs popularity in hardware design from both academia and industry, this emerging field remains unexplored, signaling a pressing need for a thorough examination and validation of these innovative methods. In this timely survey, we first briefly discuss the emergence of LLMs to revolutionize the hardware design process and then offer an in-depth analysis of existing state-of-the-art techniques in this field, which are classified into two categories: generating Verilog code and enhancing hardware security. Next, for each category, we analyze and summarize key potentials and challenges of the available techniques to provide an insightful discussion that will enable researchers, engineers, and practitioners to easily choose the right approach for their specific needs. We also report the security and privacy related limitations of the existing LLMs which must be carefully considered for chip design. Finally, we delineate some inspiring research directions to fully realize the untapped potential of the emergent LLMs technology in shaping the future of hardware design and verification.