An Ultra-Wideband Substrate Integrated Coaxial Line Array Based on Silicon-Based MEMS Process

In this paper, an ultra-wideband substrate integrated coaxial line (SICL) array based on silicon-based MEMS process is proposed for high-speed data transmission. A quasi-coaxial transition array is designed to connect the SICL array with grounded-coplanar waveguides (GCPWs). Moreover, a stepped-impedance matching structure is introduced to reduce the discontinuities and improve the transmission performance. For high efficiency design, a Bayesian Optimization (BO)-based approach is adopted to optimize dimensions of the proposed SICL array. The objective function is set to be the weighted combination of the bandwidth and the crosstalk of the proposed array structure to obtain wide bandwidth and low crosstalk simultaneously. With the proposed BO-based approach, iteration times can be reduced by approximately 99.9% compared with the parametric sweep method. A 40-channel SICL array is designed and fabricated under silicon-based Micro-electromechanical Systems (MEMS) process. Ultra-wideband of 110[Formula: see text]GHz is measured in each channel with the insertion loss less than 3[Formula: see text]dB and the return loss larger than 15[Formula: see text]dB. The couplings between two adjacent channels are no more than [Formula: see text]30[Formula: see text]dB. Good eye diagram and low bit error rate (BER) are achieved for each channel at data rate of 95[Formula: see text]Gb/s and hence the total data rate can reach 3.8[Formula: see text]Tb/s. The bandwidth density of the proposed SICL array is 0.164[Formula: see text]Gb/s/[Formula: see text]m, which is much higher than those of the conventional SICLs.