A Novel Sinusoidal Oscillator Using Single Voltage Differencing Buffered Amplifier

In this paper, a voltage differencing buffered amplifier (VDBA)-based second-order sinusoidal oscillator (SO) configuration, which provides voltage output at low impedance, is proposed. The circuit employs single VDBA, three resistors and two grounded capacitors, which presume its easy monolithic integration with preferred circuit simplicity. The nonidealities of VDBA due to parasitic and tracking errors are taken into consideration to study the nonideal behavior of proposed SO. Mathematical modeling of phase noise is computed in the paper. Active and passive sensitivities are calculated for the proposed configuration and are found to be less than unity rendering circuit insensitive to component variations followed by phase noise study. The functionality of the proposed topology is validated through cadence virtuoso ADE spectre tool at 180-nm technology node. Experimental verification is executed through commercially available ICs AD844 by good results. The total harmonic distortion (THD) is found to be below 3.5%. The observed frequency of oscillation is found to be in close agreement with the theoretical values. The PVT and Monte Carlo statistical analyses are also carried out to confirm the sensitivity of the proposed SO.

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Publication Details

Journal
Journal of Circuits Systems and Computers
Published
2024-08-11
DOI
https://doi.org/10.1142/s0218126625500197
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
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article

A Novel Sinusoidal Oscillator Using Single Voltage Differencing Buffered Amplifier

Priyanka Gupta, Rajeshwari Pandey, Gurumurthy Komanapalli
Journal of Circuits Systems and Computers
Analog and Mixed-Signal Circuit Design
article

A Novel Sinusoidal Oscillator Using Single Voltage Differencing Buffered Amplifier

Priyanka Gupta, Rajeshwari Pandey, Gurumurthy Komanapalli
article en

Abstract

In this paper, a voltage differencing buffered amplifier (VDBA)-based second-order sinusoidal oscillator (SO) configuration, which provides voltage output at low impedance, is proposed. The circuit employs single VDBA, three resistors and two grounded capacitors, which presume its easy monolithic integration with preferred circuit simplicity. The nonidealities of VDBA due to parasitic and tracking errors are taken into consideration to study the nonideal behavior of proposed SO. Mathematical modeling of phase noise is computed in the paper. Active and passive sensitivities are calculated for the proposed configuration and are found to be less than unity rendering circuit insensitive to component variations followed by phase noise study. The functionality of the proposed topology is validated through cadence virtuoso ADE spectre tool at 180-nm technology node. Experimental verification is executed through commercially available ICs AD844 by good results. The total harmonic distortion (THD) is found to be below 3.5%. The observed frequency of oscillation is found to be in close agreement with the theoretical values. The PVT and Monte Carlo statistical analyses are also carried out to confirm the sensitivity of the proposed SO.

Journal of Circuits Systems and ComputersVol. 33(18)
SRM University (IN), VIT-AP University, Delhi Technological University (IN), Bharati Vidyapeeth (Deemed to be University) (IN)
Affordable and clean energy
Openalex Percentile: Top 89%
Analog and Mixed-Signal Circuit Design
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