Substitution of kernel functions based on pattern matching on schedule trees
With the rise of AI, computing hardware with varying architectures has emerged. For some frequently used AI kernels, these hardwares provide special accelerators and related instructions. For example, since the Volta architecture, Nvidia GPUs have provided tensor cores to optimize operations related to matrix multiplication. The vector extension of the RISC-V architecture provides instruction-level parallelism for kernels.
Authors
- Wuu Yang (ORCID: https://orcid.org/0000-0001-8913-5662)
- Z Chen
Institutions
- National Yang Ming Chiao Tung University (TW)
Publication Details
- Published
- 2024-08-09
- DOI
- https://doi.org/10.1145/3677333.3678152
- Primary Topic
- Parallel Computing and Optimization Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00