Substitution of kernel functions based on pattern matching on schedule trees

With the rise of AI, computing hardware with varying architectures has emerged. For some frequently used AI kernels, these hardwares provide special accelerators and related instructions. For example, since the Volta architecture, Nvidia GPUs have provided tensor cores to optimize operations related to matrix multiplication. The vector extension of the RISC-V architecture provides instruction-level parallelism for kernels.

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Published
2024-08-09
DOI
https://doi.org/10.1145/3677333.3678152
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
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article

Substitution of kernel functions based on pattern matching on schedule trees

Wuu Yang, Z Chen
Parallel Computing and Optimization Techniques
article

Substitution of kernel functions based on pattern matching on schedule trees

Wuu Yang, Z Chen
article en

Abstract

With the rise of AI, computing hardware with varying architectures has emerged. For some frequently used AI kernels, these hardwares provide special accelerators and related instructions. For example, since the Volta architecture, Nvidia GPUs have provided tensor cores to optimize operations related to matrix multiplication. The vector extension of the RISC-V architecture provides instruction-level parallelism for kernels.

National Yang Ming Chiao Tung University (TW)
Openalex Percentile: Top 88%
Parallel Computing and Optimization Techniques
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Substitution of kernel functions based on pattern matching on schedule trees — Wuu Yang, Z Chen · (2024) | TGRS Research Map | TGRS