An Ultrafast and Low-Invasive Short-Circuit Current Limiting Method by Gate Voltage Control for SiC MOSFETs With Kelvin-Source
In silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">(mosfet</small> s) short-circuit fault, large short-circuit current spikes during the delay time of short-circuit protection will increase its risk of damage and accelerate device degradation. This article proposed an ultrafast and low-invasive short-circuit current limiting method by gate voltage control for SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s with Kelvin-source. By introducing a negative feedback composed of a low-invasive analog circuit into the gate driver, the proposed current limiting method can effectively limit SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s short-circuit current. It offers the advantages including ultrafast response, almost no additional power losses, excellent universality, and easy devices selection. The basic physical principles of the current limiting method are explained and the detailed circuit design is given. Furthermore, considerations in circuit design are discussed, including the analysis of the laws governing the negative feedback system to aid in device selection. A prototype of a gate driver for SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> with desaturation protection and the proposed short-circuit current limiting circuit is constructed. Double pulse tests and short-circuit tests are conducted using two types of SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s with varying rated voltage and current ratings. The results indicate that the proposed current limiting method can reduce the peak current by 52.2% and the short-circuit energy by 57.1% with almost no additional conduction loss and less than 1% increase in switching loss. Additionally, during the short-circuit tests, the proposed current limiting method shows insensitivity to varying drain-source voltage and current rising rates, highlighting its exceptional universality.
Authors
- Chi Li (ORCID: https://orcid.org/0000-0001-7873-3173)
- Jianwei Liu (ORCID: https://orcid.org/0000-0001-9003-8667)
- Zedong Zheng (ORCID: https://orcid.org/0000-0003-4392-3502)
- Yifan Wu (ORCID: https://orcid.org/0000-0002-0437-1859)
Institutions
- Tsinghua University (CN)
Publication Details
- Journal
- IEEE Transactions on Power Electronics
- Published
- 2024-08-09
- DOI
- https://doi.org/10.1109/tpel.2024.3441329
- Citations
- 5
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 1.04
Funders
- National Natural Science Foundation of China
- Natural Science Foundation of Beijing Municipality