Low Power CMOS Differential Amplifiers through ACM Model: Process Variations and Yield Prediction

Statistical techniques are regularly used to predict the performance of electronic systems. Process variations which account for the uncertainties in material parameters at the time of fabrication adversely affect the yield of analog integrated circuits. The statistical analysis of variations in key output parameters of an analog circuit due to variations in the fabrication parameters for yield prediction isan essential step in analog chip fabrication. In this work, we use a rigorous statistical approach to examine the performance of atypical analog circuit. We have designed a two stage CMOS differential amplifier configuration at 65 nm technology usingACM model parameters to examine the yield under process variations. We employ three different Monte Carlo models(uniform, gaussian, worst-case) to examine the statistical variation in key performance parameters of the designedCMOS differential amplifier. Variations in key differential amplifier parameters, maximum gain, gain margin and phasemargin have been reported under 10% variations in typical process parameters. Maximum variability is observed in case ofthe worst-case distribution while the minimum variability is found in case of Gaussian distribution. The results showsignificant impact of process variation on the yield of the designed CMOS differential amplifier. In the case of gaussiandistribution, the standard deviation for gain margin(dB), phase margin (degrees) and maximum gain(dB) is found to be 11, 25and 24 respectively.