Discovering the Impact of Cooling Scheme During Annealing: A New Knob for Achieving Thermally Stable IGZO FETs

To improve the thermal stability of indium-gallium-zinc-oxide (IGZO) field-effect transistors (FETs) in the oxygen-deficient environment, we examined the different annealing schemes with temperatures up to 450 °C. Our study revealed that the performance of IGZO FETs is not solely affected by the annealing temperature but also strongly influenced by the cooling scheme. Oxygen vacancies (V<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {O}}\text {)}$ </tex-math></inline-formula> generated at high temperatures can remain at a high concentration, while VO can be gradually reduced with the slow cooling scheme. Additionally, we analyzed the impacts of downscaling the channel thickness (t<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {ch}}\text {)}$ </tex-math></inline-formula> on the thermal stability of IGZO FETs, observing that a thin IGZO channel leads to the positive threshold voltage (V<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {th}}\text {)}$ </tex-math></inline-formula> but suffers from more severe degradation in electrical performance and reliability. Based on the slow cooling scheme and proper selection of tch, a near-zero Vth and a relatively low subthreshold swing (SS) of 150 mV/dec of IGZO FETs with a channel length scaled to 100 nm are achieved after undergoing a high annealing temperature of 450 °C. Our discovery brings new possibilities for device fabrication and optimization for the advanced IGZO FETs.