Multicore and Network Topology Codesign for Pareto-Optimal Multinode Architecture

This paper presents an exploration framework for multinode multicore High-Performance Computing (HPC) systems. The proposed method allows to explore rapidly various network topologies to find the optimized solutions in terms of latency for a given application. The proposed method facilitates the in-depth Design Space Exploration (DSE) to identify Pareto-optimal solutions in HPC systems. Experiments demonstrate that our method accelerates HW-SW co-design search by a factor of 3.7 compared to a semi-exhaustive method.