Concept and Technology for Full Monolithic MOSFET and JBS Vertical Integration in Multi-Terminal 4H-SiC Power Converters

New and original medium power multi-terminal SiC monolithic converter architectures are investigated with vertical switching cells based on SiC JBS diodes and VDMOS transistors. 2D TCAD and mixed-mode Sentaurus™ simulations are performed to optimize switching structures as Buck, Boost, H-bridge high-side row chip common drain-type and low-side row chip common source-type. The proper operation in the turn-on and turn-off of each cell is also studied and validated. To fabricate these new monolithic integrated architectures, two main technological bricks have been developed, for vertical insulation and the integration of a top Ni metal via. To achieve the vertical insulation deep trenches are necessary combining dry plasma and wet KOH electrochemical etching through the thick N + substrate.

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Journal
Diffusion and defect data, solid state data. Part B, Solid state phenomena/Solid state phenomena
Published
2024-08-21
DOI
https://doi.org/10.4028/p-pztj4o
Primary Topic
Silicon Carbide Semiconductor Technologies
Type
article
Field-Weighted Citation Impact
0.00

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article

Concept and Technology for Full Monolithic MOSFET and JBS Vertical Integration in Multi-Terminal 4H-SiC Power Converters

Luong Viêt Phung, Dominique Planson, Philippe Godignon, Ralph Makhoul et al.
Diffusion and defect data, solid state data. Part B, Solid state phenomena/Solid state phenomena
Silicon Carbide Semiconductor Technologies
article

Concept and Technology for Full Monolithic MOSFET and JBS Vertical Integration in Multi-Terminal 4H-SiC Power Converters

Luong Viêt Phung, Dominique Planson, Philippe Godignon, Ralph Makhoul, Abdelhakim Bourennane, Frédéric Richardeau, Hervé Morel, Nour Beydoun, David Bourrier, Mihai Lazar
article en

Abstract

New and original medium power multi-terminal SiC monolithic converter architectures are investigated with vertical switching cells based on SiC JBS diodes and VDMOS transistors. 2D TCAD and mixed-mode Sentaurus™ simulations are performed to optimize switching structures as Buck, Boost, H-bridge high-side row chip common drain-type and low-side row chip common source-type. The proper operation in the turn-on and turn-off of each cell is also studied and validated. To fabricate these new monolithic integrated architectures, two main technological bricks have been developed, for vertical insulation and the integration of a top Ni metal via. To achieve the vertical insulation deep trenches are necessary combining dry plasma and wet KOH electrochemical etching through the thick N + substrate.

Diffusion and defect data, solid state data. Part B, Solid state phenomena/Solid state phenomenaVol. 358
Université Claude Bernard Lyon 1 (FR), Centre National de la Recherche Scientifique (FR), Université Toulouse III - Paul Sabatier (FR), Université de Technologie de Troyes (FR), Université Fédérale de Toulouse Midi-Pyrénées (FR), Institut National Polytechnique de Toulouse (FR), Laboratoire Plasma et Conversion d'Energie (FR), Institut de Microelectrònica de Barcelona (ES), Institut National des Sciences Appliquées de Lyon (FR)
Agence Nationale de la Recherche, Centre National de la Recherche Scientifique
Affordable and clean energy
Openalex Percentile: Top 100%
Silicon Carbide Semiconductor Technologies
DOIOpen Access PDFOpenAlex
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