Technical Challenges Running TARDEC VECTOR Software on ARM Architecture

<title>ABSTRACT</title> <p>TARDEC VEA will begin integrating their Vehicular Integration for the Command, Control, Communications, Computers, Intelligence, Surveillance and Reconnaissance / Electronic Warfare (C4ISR/EW) Interoperability (VICTORY) Enabled Company Transformation (VECTOR) software onto three unique military vehicles in FY2015. One of the main objectives of VECTOR is to evaluate the VICTORY standard. VECTOR will use the aforementioned military vehicles as a platform for integration with the VICTORY software library (libVictory). The feasibility of expediting component integration and enhancing vehicles in theatre will be assessed; VECTOR will attempt to leverage the capabilities of libVictory in order to do so. One of the key deliverables for VECTOR is the capability to port the software applications and middleware configuration items to an embedded low-cost ARM architecture. The VECTOR team selected a unique hybrid system that includes both a single board computer and an Ethernet switch. This research paper will present the rationale for porting VECTOR software to the ARM architecture and explain the details of overcoming technical challenges therein. Due to the fact that the ARM architecture is designed for mobile applications, computing hardware resources and software availability are much more limited than common Intel-based desktop or workstation computers. Consequently, the level of technical risk is greatly increased, and the viability of executing the required full-blown, graphical desktop application is less likely. This paper will capture these shortcomings and will illustrate the difficulties of overcoming the hurdles of limited computing resources. Finally, this paper will provide some quantitative measurements of performance (resource utilization, graphical interface lag times, and update rate thresholds) as observed on the embedded ARM processor (also referred to as the target), and how certain optimizations can improve the system.</p>

Authors

Institutions

Publication Details

Journal
SAE technical papers on CD-ROM/SAE technical paper series
Published
2024-11-15
DOI
https://doi.org/10.4271/2024-01-3508
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Technical Challenges Running TARDEC VECTOR Software on ARM Architecture

Mark Russell
SAE technical papers on CD-ROM/SAE technical paper series
Parallel Computing and Optimization Techniques
article

Technical Challenges Running TARDEC VECTOR Software on ARM Architecture

Mark Russell
article en

Abstract

<title>ABSTRACT</title> <p>TARDEC VEA will begin integrating their Vehicular Integration for the Command, Control, Communications, Computers, Intelligence, Surveillance and Reconnaissance / Electronic Warfare (C4ISR/EW) Interoperability (VICTORY) Enabled Company Transformation (VECTOR) software onto three unique military vehicles in FY2015. One of the main objectives of VECTOR is to evaluate the VICTORY standard. VECTOR will use the aforementioned military vehicles as a platform for integration with the VICTORY software library (libVictory). The feasibility of expediting component integration and enhancing vehicles in theatre will be assessed; VECTOR will attempt to leverage the capabilities of libVictory in order to do so. One of the key deliverables for VECTOR is the capability to port the software applications and middleware configuration items to an embedded low-cost ARM architecture. The VECTOR team selected a unique hybrid system that includes both a single board computer and an Ethernet switch. This research paper will present the rationale for porting VECTOR software to the ARM architecture and explain the details of overcoming technical challenges therein. Due to the fact that the ARM architecture is designed for mobile applications, computing hardware resources and software availability are much more limited than common Intel-based desktop or workstation computers. Consequently, the level of technical risk is greatly increased, and the viability of executing the required full-blown, graphical desktop application is less likely. This paper will capture these shortcomings and will illustrate the difficulties of overcoming the hurdles of limited computing resources. Finally, this paper will provide some quantitative measurements of performance (resource utilization, graphical interface lag times, and update rate thresholds) as observed on the embedded ARM processor (also referred to as the target), and how certain optimizations can improve the system.</p>

SAE technical papers on CD-ROM/SAE technical paper seriesVol. 1
United States Army Combat Capabilities Development Command (US), United States Army (US)
Openalex Percentile: Top 100%
Parallel Computing and Optimization Techniques
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.