Autonomous Data Acquisition using the ACTEL 1020 FPGA

The Actel 1020 Field Programmable Gate Array (FPGA) is a low power CMOS device equivalent to 2000 logic gates. It is a one-time programmable device utilizing non-volatile PLICETM anti-fuse programming. The 2-micron, two level metal CMOS process has been tested Rad Hard to 400K Rad total dose Si making it suitable for space applications. In the Barnes Dual Cone Scanner Earth Horizon Sensor, it has been used (with an A/D converter) to autonomously sample radiance data and store it in pseudo-dual port memory. The Actel chip is also used to control bus access to the memory. The Barnes implementation replaces many discrete logic components and frees up processor time by putting the data in memory autonomously. This architecture is applicable to any system requiring low power data acquisition in a minimum amount of board space.

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Publication Details

Journal
Digital Commons - USU (Utah State University)
Published
2025-09-09
DOI
https://doi.org/10.26077/ax6y-0p78
Primary Topic
Embedded Systems and FPGA Design
Type
article
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article

Autonomous Data Acquisition using the ACTEL 1020 FPGA

Ron Novick
Digital Commons - USU (Utah State University)
Embedded Systems and FPGA Design
article

Autonomous Data Acquisition using the ACTEL 1020 FPGA

Ron Novick
article en

Abstract

The Actel 1020 Field Programmable Gate Array (FPGA) is a low power CMOS device equivalent to 2000 logic gates. It is a one-time programmable device utilizing non-volatile PLICETM anti-fuse programming. The 2-micron, two level metal CMOS process has been tested Rad Hard to 400K Rad total dose Si making it suitable for space applications. In the Barnes Dual Cone Scanner Earth Horizon Sensor, it has been used (with an A/D converter) to autonomously sample radiance data and store it in pseudo-dual port memory. The Actel chip is also used to control bus access to the memory. The Barnes implementation replaces many discrete logic components and frees up processor time by putting the data in memory autonomously. This architecture is applicable to any system requiring low power data acquisition in a minimum amount of board space.

Digital Commons - USU (Utah State University)
Apollo Global Management (United States) (US)
Embedded Systems and FPGA Design
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