Latest Research in Hardware Architecture

Top Research Topics in Hardware Architecture

• Hardware Architecture — 8 papers
• Computer Vision and Pattern Recognition — 6 papers
• Advanced Memory and Neural Computing — 4 papers
• Robotics — 2 papers
• Neural and Evolutionary Computing — 2 papers
• Machine Learning — 2 papers
• Artificial Intelligence — 1 papers
• Computation and Language — 1 papers
• Distributed, Parallel, and Cluster Computing — 1 papers
• Parallel Computing and Optimization Techniques — 1 papers

Highest-Cited Papers

1. Mask IPL: Noise-Free Intrinsic Position Learning via Computation Graph Clipping for Event-Based Spike-Driven Tracking
2. REACT: A Fully Spiking State-Space Model for Real-Time Event-Driven Temporal Perception
3. Event-based Selective Attention for Multi-resolution Fast Region of Interest (ROI) Detection
4. Efficient event-driven retrieval in high-capacity kernel Hopfield networks
5. Syn2Logic: End-to-End Neuromorphic Design Automation
6. Bio-inspired Learning and Decision-Making with Probabilistic In-Memory Computing Hardware: Part 1
7. SymbolicLight V2: Hybrid Neuromorphic Architecture and Sparse Execution for Low-Energy Language Inference
8. NOVA-CIM: Noise- and Correlation-Tolerant Stochastic Interfaces for Analog Compute-in-Memory
9. A Hardware-Constrained Quadratic Spike-Rate Learning Rule for Multi-Compartment Neuromorphic Neurons: Architecture, Fixed-Point Implementation, and Empirical Δt Characterization
10. FlexSpIM: An Event-Based Digital Compute-In-Memory Accelerator with Flexible Operand Resolution and Layer-Wise Hybrid Stationarity
11. GPU-Accelerated Hypergraph Partitioning and Placement to Map SNNs on Neuromorphic Hardware
12. Event-based Optical Marker Systems: A survey
13. Efficient Multi-Timescale Event Representations for Feed-Forward Object Detection
14. Retention-Aware RISC-V ISA Extension and Memory Controller on FPGA for MLC NVM
15. A Time-Encoded Analog Photonic Interposer for Energy-EfficientIntegration of Analog Vision Sensors and Analog Accelerators
16. FALCON: Fault-Tolerant Magnetic Tunnel Junction-Based In-Memory Stochastic Architecture for Reliability-Critical Edge AI Applications
17. Non-uniform Memory Partitioning For Low-Power Spiking Neural Networks
18. ITP-STDP: A Hardware-Efficient Intrinsic-Timing Power-of-Two Synaptic Learning Engine for On-Chip SNNs
19. Towards an Expressivity-Normalized Energy-Demand Comparison of ANNs and SNNs
20. An energy-efficient spiking neural network accelerator on FPGA for real-time health monitoring of rotating machinery